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Cerebras Systems unveils 1.2 trillion transistor wafer-scale processor for AI



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Modern CPU transistor count is huge – AMD announced earlier this month that a full implementation of the 7nm Epyc "Roma" CPU weighs in at 32 billion transistors. To this, Cerebras Technology says, "Hold my beer." The AI-focused company has designed what it calls a Wafer Scale Engine. WSE is a square, about eight inches by nine inches, and contains about 1.2 trillion transistors.

I'm really surprised to see a company that brings a larger-scale product to market it quickly. The idea of ​​wafer-scale machining has attracted some attention lately as a potential solution to performance scaling difficulties. In the study we discussed earlier this year, researchers evaluated the idea of ​​building a huge GPU across most or all of a 100mm slice. They found that the technique could produce viable high-performance processors and that it could also be scaled effectively to larger node sizes. Cerebras WSE definitely qualifies as lorge large – the total surface area is much larger than the hypothetical designs we considered earlier this year. It is not a 300 mm full size disc, but it has a higher surface area than it does 200 mm.

The Largest GPU,  SEEAMAZON_ET_135 See Amazon ET commerce just for comparison, measuring 815 square meters and packing 21.1 B transistors. So Cerebras WSE is just a bit bigger as these things go. Some companies send out pictures of their chips that are kept next to a less common object, such as a neighborhood. Cerebras sent out a picture of the door next to a keyboard.

  cerebras-1-100808712-large

Not pictured: PCIe x1600 slot.

As you can see, it compares quite well.

Cerebras WSE contains 400,000 sparse linear algae cores, 18 GB total memory of die, 9 MB / sec of bandwidth over the chip and separate fabric bandwidth of up to 100Pbit / sec. The entire chip is built on TSMC's 16nm FinFET process. Because the chip is built from (most) of a single disk, the company has implemented methods for routing around bad cores on-die and can keep the groups connected even if it has bad cores in part of the disk. The company says they have redundant kernels implemented on-die, though it has not yet discussed specifications. Details of the design will be presented at Hot Chips this week.

WSE – "CPU" simply does not suffice – is cooled by means of a solid cold plate mounted over the silicon, with vertically mounted water pipes used for direct cooling. Since there is no traditional package large enough to fit the piece, Cerebras has designed its own. PCWorld describes it as "combining a PCB, the wafer, a custom connector that connects the two and the cold plate." Details of the chip, such as its raw performance and power consumption, are not yet available.

A fully functional disk-scale processor, commercialized in scale, would be an exciting demonstration of whether this technological approach has any relevance to the broader market. Although we will never see consumer components sold this way, there has been an interest in using wafer-scale processing to improve performance and power consumption in a number of markets. If consumers continue to move workloads to the cloud, especially high-performance workloads like games, it's not crazy to think that one day we can see GPU manufacturers taking advantage of this idea – and building matrices of parts that no individual could ever have advice to operate cloud gaming systems in the future.

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